Experienced HDL Design Engineer
- University level Degree in Electronic/Electrical Engineering or a relevant field.
- Experience in VHDL / Verilog based digital circuit design.
- No military service obligation pending.
Experience/knowledge in any of the following areas is strongly desirable:
- ASIC design.
- FPGA-based design.
- Digital Signal Processing.
Send your CVs at
I.S.D. Integrated Systems Development S.A.
32 Kifisias Avenue
Atrina Center, Building B
GR-15125 Marousi
Greece
Telephone: +30 210 6895115
Fax: +30 210 6895412