H. T. Vergos received the Computer Engineering Diploma and the Ph.D. degree for his research on fault tolerant cache memory architectures, from the Computer Engineering and Informatics Department (CEID) of the University of Patras, in 1991 and 1996, respectively.

He then worked as an ASIC designer for Atmel Inc. He was a member of the team that developed the first worldwide IEEE 802.11 standard compliant medium access control processor and other network components. He rejoined CEID as a faculty member in 1998 and has since elevated up to a full Professor degree.

His research focuses on arithmetic circuit architectures, VLSI design and test, rapid prototyping of computer systems and graceful degradation for fault tolerance. He serves as a reviewer in nearly all well-known conferences and accredited journals in these fields and he is a Senior IEEE Member.

He teaches the courses “Introduction to Computer Systems” and “E-CAD for Digital Hardware” for the undergraduate program and the “Fault Tolerant Computer Systems” graduate course. In the past he taught several other courses and supervised a number of laboratories. He was also the Director of the development of AT91, which is a complete platform for the undergraduate assembly and microcomputers lab courses of CEID.

He currently is the Head of the Hardware and Computer Architecture Division of CEID and the Director of the Microelectronics Laboratory. He has also served as the Director of the Laboratory for Computing (Computer Center) of CEID in 2011-2012 and 2013-2014.